NXP Semiconductors /LPC408x_7x /MCPWM /INTF_CLR

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Interpret as INTF_CLR

Description

Interrupt flags clear address

Fields

ILIM0_F_CLR	Writing a one clears the corresponding bit in the INTF register, thus clearing the corresponding interrupt request.
IMAT0_F_CLR	Writing a one clears the corresponding bit in INTEN, thus disabling the interrupt.
ICAP0_F_CLR	Writing a one clears the corresponding bit in INTEN, thus disabling the interrupt.
RESERVED	Reserved.
ILIM1_F_CLR	Writing a one clears the corresponding bit in INTEN, thus disabling the interrupt.
IMAT1_F_CLR	Writing a one clears the corresponding bit in INTEN, thus disabling the interrupt.
ICAP1_F_CLR	Writing a one clears the corresponding bit in INTEN, thus disabling the interrupt.
RESERVED	Reserved.
ILIM2_F_CLR	Writing a one clears the corresponding bit in INTEN, thus disabling the interrupt.
IMAT2_F_CLR	Writing a one clears the corresponding bit in INTEN, thus disabling the interrupt.
ICAP2_F_CLR	Writing a one clears the corresponding bit in INTEN, thus disabling the interrupt.
RESERVED	Writing a one clears the corresponding bit in INTEN, thus disabling the interrupt.
ABORT_F_CLR	Writing a one clears the corresponding bit in INTEN, thus disabling the interrupt.
RESERVED	Reserved.

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